Dr. Espinosa-Neira, Eduardo

In this paper, we present an implementation of selective harmonic elimination modulation technique in a 27-Level asymmetric multilevel converter. The main issue in this kind of converters is the generation of the gating patterns to obtain an optimized AC voltage waveform. State-of-the art solutions use deep mathematical analysis in the frequency domain by means of the Fourier series, but they are mainly applied for two-level or symmetric multilevel converters. On the other hand, the modulation for asymmetric multilevel converters is mainly focused on nearest level control or nearest vector control. In this work, we propose a novel modulating technique that takes advantage of the switching angles optimization for a 27-level waveform. In fact, different set of solutions are obtained and presented in order to define the modulation index as well as the value of the switching angles for the multilevel waveform. A modulation index sweep was performed for the entire operating region of the converter, where it can be observed that the number of levels decreases when the modulation index is low, which are calculated in order to minimize the total harmonic distortion (THD) of the resulting voltage waveform. In order to validate the proposal, these results for different modulation indexes values are simulated, obtaining a THD < 5% for a modulation index 0.75 < M < 1.0. Finally, a small scale proof-of-concept prototype is implemented in order to validate the proposal. © 2022 by the authors. Licensee MDPI, Basel, Switzerland.

The use of controlled power converters has been extended for high power applications, stacking off-the-shelve semiconductors, and allowing the implementation of, among others, AC drives for medium voltages of 2.3 kV to 13.8 kV. For AC drives based on power cells assembled with three-phase diode rectifiers and cascaded H-bridge inverters, a sophisticated input multipulse transformer is required to reduce the grid voltage, provide isolation among the power cells, and compensate for low-frequency current harmonics generated by the diode-based rectifiers. However, this input multipulse transformer is bulky, heavy, and expensive and must be designed according to the number of power cells, not allowing total modularity of the AC drives based on cascade H-bridges. This study proposes and evaluates a control strategy based on a finite control set-model predictive control that emulates the harmonic cancellation performed by an input multipulse transformer in a cascade H-bridge topology. Hence, the proposed method requires conventional input transformers and replaces the three-phase diode rectifiers. As a result, greater modularity than the conventional multicell converter and improved AC overall input current with a THD as low as 2% with a unitary displacement power factor are achieved. In this case, each power cell manages its own DC voltage using a nonlinear control strategy, ensuring stable system operation for passive and regenerative loads. The experimental tests demonstrated the correct performance of the proposed scheme.

This work proposes a multicell topology based on current-source cells in order to inherit the advantages of current-source topologies such as reduced load dv/dt voltage and natural bidirectional power flow and to adopt a similar behavior of the multicell topology based on a voltage source converter such as voltage controlled behavior where n C cells are connected in series to feed one load phase. In order to check the technical feasibility and performance of the proposed topology, a mathematical model is introduced and studied and key design guidelines of passive components are defined. The analysis shows the possibility of using components with a lower voltage rating than that of the classic multilevel current source topologies and allows the use of low switching frequencies in both rectifier and inverter stages while at the same time obtaining a high-quality waveform in both load voltage and converter input currents. A case of example is used to corroborate the theoretical analysis and the component design methodology, as well as the performance of the topology using a low-power prototype.